{"id":8401,"date":"2022-04-28T21:12:37","date_gmt":"2022-04-28T21:12:37","guid":{"rendered":"https:\/\/www.tun.com\/courses\/2019\/12\/23\/vlsi-cad-part-i-logic\/"},"modified":"2022-04-28T21:12:37","modified_gmt":"2022-04-28T21:12:37","slug":"vlsi-cad-part-i-logic","status":"publish","type":"post","link":"https:\/\/www.tun.com\/courses\/vlsi-cad-part-i-logic\/university-of-illinois-at-urbana-champaign\/","title":{"rendered":"VLSI CAD Part I: Logic"},"content":{"rendered":"
\n
\n
\n

Description<\/h2>\n

A modern VLSI chip has a zillion parts — logic, control, memory, interconnect, etc. How do we design these complex chips? Answer: CAD software tools. Learn how to build thesA modern VLSI chip is a remarkably complex beast: billions of transistors, millions of logic gates deployed for computation and control, big blocks of memory, embedded blocks of pre-designed functions designed by third parties (called \u201cintellectual property\u201d or IP blocks). How do people manage to design these complicated chips? Answer: a sequence of computer aided design (CAD) tools takes an abstract description of the chip, and refines it step-wise to a final design. This class focuses on the major design tools used in the creation of an Application Specific Integrated Circuit (ASIC) or System on Chip (SoC) design. Our focus in this first part of the course is on key Boolean logic representations that make it possible to synthesize, and to verify, the gate-level logic in these designs. This is the first step of the design chain, as we move from logic to layout. Our goal is for students to understand how the tools themselves work, at the level of their fundamental algorithms and data structures. Topics covered will include: Computational Boolean algebra, logic verification, and logic synthesis (2-level and multi-level).<\/p>\n

Recommended Background
\nProgramming experience (C, C++, Java, Python, etc.) and basic knowledge of data structures and algorithms (especially recursive algorithms). An understanding of basic digital design: Boolean algebra, Kmaps, gates and flip flops, finite state machine design. Linear algebra and calculus at the level of a junior or senior in engineering. Exposure to basic VLSI at an undergraduate level is nice — but it\u2019s not necessary. We will keep the course self-contained, but students with some VLSI will be able to skip some background material.e tools in this class.<\/p>\n

<\/div>\n

Price: Enroll For Free!<\/h2>\n
<\/div>\n
View Class<\/a><\/div>\n
<\/div>\n
\n
\n

Language:<\/strong> <\/em>English<\/p>\n<\/div>\n

\n

Subtitles<\/strong>: <\/em>English<\/p>\n<\/div>\n<\/div>\n

VLSI CAD Part I: Logic – University of Illinois at Urbana-Champaign<\/strong><\/a><\/p>\n","protected":false},"excerpt":{"rendered":"

Description A modern VLSI chip has a zillion parts — logic, control, memory, interconnect, etc. How do we design these complex chips? Answer: CAD software tools. Learn how to build thesA modern VLSI chip is a remarkably complex beast: billions of transistors, millions of logic gates deployed for computation and control, big blocks of memory, […]<\/p>\n","protected":false},"author":1,"featured_media":19329,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"om_disable_all_campaigns":false,"_uag_custom_page_level_css":"","_monsterinsights_skip_tracking":false,"_monsterinsights_sitenote_active":false,"_monsterinsights_sitenote_note":"","_monsterinsights_sitenote_category":0,"_uf_show_specific_survey":0,"_uf_disable_surveys":false,"footnotes":""},"categories":[255],"tags":[],"class_list":["post-8401","post","type-post","status-publish","format-standard","has-post-thumbnail","hentry","category-university-of-illinois-at-urbana-champaign"],"aioseo_notices":[],"uagb_featured_image_src":{"full":["https:\/\/www.tun.com\/courses\/wp-content\/uploads\/2019\/12\/University-of-Illinois-at-Urbana-Champaignonline-education.png",375,224,false],"thumbnail":["https:\/\/www.tun.com\/courses\/wp-content\/uploads\/2019\/12\/University-of-Illinois-at-Urbana-Champaignonline-education-150x150.png",150,150,true],"medium":["https:\/\/www.tun.com\/courses\/wp-content\/uploads\/2019\/12\/University-of-Illinois-at-Urbana-Champaignonline-education-300x179.png",300,179,true],"medium_large":["https:\/\/www.tun.com\/courses\/wp-content\/uploads\/2019\/12\/University-of-Illinois-at-Urbana-Champaignonline-education.png",375,224,false],"large":["https:\/\/www.tun.com\/courses\/wp-content\/uploads\/2019\/12\/University-of-Illinois-at-Urbana-Champaignonline-education.png",375,224,false],"1536x1536":["https:\/\/www.tun.com\/courses\/wp-content\/uploads\/2019\/12\/University-of-Illinois-at-Urbana-Champaignonline-education.png",375,224,false],"2048x2048":["https:\/\/www.tun.com\/courses\/wp-content\/uploads\/2019\/12\/University-of-Illinois-at-Urbana-Champaignonline-education.png",375,224,false]},"uagb_author_info":{"display_name":"Axiom Pegasus","author_link":"https:\/\/www.tun.com\/courses\/author\/magic\/"},"uagb_comment_info":0,"uagb_excerpt":"Description A modern VLSI chip has a zillion parts — logic, control, memory, interconnect, etc. How do we design these complex chips? Answer: CAD software tools. Learn how to build thesA modern VLSI chip is a remarkably complex beast: billions of transistors, millions of logic gates deployed for computation and control, big blocks of memory,…","featured_media_src_url":"https:\/\/www.tun.com\/courses\/wp-content\/uploads\/2019\/12\/University-of-Illinois-at-Urbana-Champaignonline-education.png","_links":{"self":[{"href":"https:\/\/www.tun.com\/courses\/wp-json\/wp\/v2\/posts\/8401","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/www.tun.com\/courses\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/www.tun.com\/courses\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/www.tun.com\/courses\/wp-json\/wp\/v2\/users\/1"}],"replies":[{"embeddable":true,"href":"https:\/\/www.tun.com\/courses\/wp-json\/wp\/v2\/comments?post=8401"}],"version-history":[{"count":0,"href":"https:\/\/www.tun.com\/courses\/wp-json\/wp\/v2\/posts\/8401\/revisions"}],"wp:featuredmedia":[{"embeddable":true,"href":"https:\/\/www.tun.com\/courses\/wp-json\/wp\/v2\/media\/19329"}],"wp:attachment":[{"href":"https:\/\/www.tun.com\/courses\/wp-json\/wp\/v2\/media?parent=8401"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/www.tun.com\/courses\/wp-json\/wp\/v2\/categories?post=8401"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/www.tun.com\/courses\/wp-json\/wp\/v2\/tags?post=8401"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}